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FPGA Engineer

FPGA Engineer

Overall purpose of job

Writing Verilog to add features to and optimise our FPGA which is responsible for managing the layer 2 network traffic processing.

Major responsibilities and tasks

  • Fix bugs and write new features for the VectaStar product
  • Work with the rest of the Software team (other software engineers as well as DSP, FPGA, Radio and other specialists) to collaborate on development projects
  • Follow the processes of the team and company.

Competencies (technical, managerial, personal skills and relevant experience)

  • A good degree in an applicable subject (Computer Science, etc) and 5 years’ relevant experience
  • Strong FPGA development skills (Verilog), preferably Xilinx
  • Experience with git, or at least other version control tools
  • Knowledge of network protocols, Layer 2, Ethernet, TCP / IP, ARP, UDP, ATM & E1
  • Happy working with large, existing code bases rather than fresh-ground development.
  • Scripting including Python and Perl
  • Radio and/telecommunications product development
  • SNMP.